About

As a Found­ing Pre­mier mem­ber of RISC‑V Inter­na­tion­al and a leader in com­mer­cial CPU IP, Andes Tech­nol­o­gy (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is dri­ving the glob­al adop­tion of RISC‑V. Andes’ exten­sive RISC‑V Proces­sor IP port­fo­lio spans from ultra-effi­cient 32-bit CPUs to high-per­for­mance 64-bit Out-of-Order mul­ti­proces­sor coher­ent clus­ters. With advanced vec­tor pro­cess­ing, DSP capa­bil­i­ties, the pow­er­ful Andes Auto­mat­ed Cus­tom Exten­sion (ACE) frame­work, end-to-end AI hardware/software stack, ISO 26262 cer­ti­fi­ca­tion with full com­pli­ance, and a robust soft­ware ecosys­tem, Andes unlocks the full poten­tial of RISC‑V, empow­er­ing cus­tomers to accel­er­ate inno­va­tion across AI, auto­mo­tive, com­mu­ni­ca­tions, con­sumer elec­tron­ics, data cen­ters, and mobile devices.
Con­nect with Andes on LinkedIn, X (for­mer­ly Twit­ter), and YouTube.

Partnership

TASKING and Andes Tech­nol­o­gy col­lab­o­rate to deliv­er func­tion­al safe­ty com­pil­er sup­port for auto­mo­tive-grade RISC‑V, dri­ving sig­nif­i­cant progress in safe­ty-crit­i­cal soft­ware develop­ment. By com­bin­ing TASKING’s ISO 26262 and ISO/SAE 21434 com­pli­ant tool­chain with Andes’ FuSa-cer­ti­fied RISC‑V IP, the part­ner­ship enables ASIL‑D com­pli­ant develop­ment across both vir­tu­al and sil­i­con envi­ron­ments. This joint ecosys­tem stream­lines work­flows for SoC design­ers and auto­mo­tive devel­op­ers, accel­er­at­ing inno­va­tion, ensur­ing com­pli­ance, and strength­en­ing the reli­a­bil­i­ty of next-gen­er­a­tion mobil­i­ty solu­tions.