About

RISC‑V is an open-stan­dard instruc­tion set archi­tec­ture (ISA) that enables inno­va­tion through col­lab­o­ra­tion and trans­paren­cy. Gov­erned by RISC‑V Inter­na­tion­al, the glob­al non­prof­it orga­ni­za­tion dri­ving its develop­ment, the RISC‑V ecosys­tem brings togeth­er semi­con­duc­tor com­pa­nies, tool ven­dors, and soft­ware devel­op­ers to cre­ate open, exten­si­ble, and ener­gy-effi­cient com­put­ing solu­tions. The archi­tec­ture is wide­ly adopt­ed across auto­mo­tive, AI, IoT, and indus­tri­al appli­ca­tions for its flex­i­bil­i­ty, scal­a­bil­i­ty, and reduced com­plex­i­ty.

Partnership

TASKING is an offi­cial RISC‑V Inter­na­tion­al mem­ber, active­ly con­tribut­ing to the glob­al RISC‑V ecosys­tem. Our TASKING Develop­ment Tools for RISC‑V deliv­er a pow­er­ful, indus­try-grade tool­chain for high-per­for­mance and safe­ty-crit­i­cal embed­ded appli­ca­tions. With the addi­tion of LDRA’s world-class ver­i­fi­ca­tion and test­ing solu­tions, TASKING now offers a com­plete suite for func­tion­al safe­ty and compliance—covering advanced com­pil­er opti­miza­tion, inte­grat­ed debug­ging, sta­t­ic and dynam­ic analy­sis, code cov­er­age, and cer­ti­fi­ca­tion sup­port for ISO 26262, IEC 61508, and DO-178C. Togeth­er, these capa­bil­i­ties empow­er devel­op­ers to build safe, reli­able, and future-ready RISC‑V solu­tions across auto­mo­tive, indus­tri­al, and IoT domains.