TASKING, Andes, and MachineWare Team up to Facilitate Rapid Development of RISC-V ASIL Compliant Automotive Silicon

Novem­ber 6, 2023

To sup­port SoC design teams in the realm of firmware and MCAL develop­ment

Munich, Ger­many, 6 Novem­ber 2023 – TASKING’s sys­tem-level ver­i­fi­ca­tion and debug­ging tools now sup­port the Andes RISC-V ISO 26262 cer­ti­fied Proces­sor IPs and asso­ci­at­ed MachineWare Vir­tu­al Mod­els. This col­lab­o­ra­tion equips SoC design teams with auto­mo­tive-grade RISC-V IPs and the appro­pri­ate tools for early firmware and MCAL (Micro­con­troller Abstrac­tion Layer) develop­ment.

TASKING has been serv­ing the glob­al auto­mo­tive indus­try for more than 30 years with soft­ware develop­ment tools cer­ti­fied for func­tion­al safe­ty and cyber­se­cu­ri­ty. The toolset released as part of the col­lab­o­ra­tion pro­vides the capa­bil­i­ties for multi-core, multi-hart, ver­i­fi­ca­tion, debug­ging, per­for­mance tun­ing, tim­ing, and cov­er­age analy­sis. The toolset can be used with Andes RISC-V develop­ment boards and MachineWare high-per­for­mance vir­tu­al pro­to­typ­ing solu­tions. More­over, the inno­v­a­tive TASKING TASKING debug adapters will be avail­able to sup­port Andes RISC-V proces­sors to enable the con­nec­tion with the toolset.

Andes Tech­nol­o­gy, a promi­nent provider of high-effi­cien­cy, low-power 32/64-bit RISC-V proces­sor cores, intro­duced the first ISO 26262 fully com­pli­ant RISC-V proces­sor IP – N25F-SE in 2022 with ASIL-B cer­ti­fi­ca­tion. Andes is also gear­ing up to unveil the ASIL-B cer­ti­fied D25F-SE equipped with RISC-V P-exten­sion (SIMD/DSP) ISA draft for effi­cient manip­u­la­tion of mul­ti­ple data in a sin­gle instruc­tion in the fourth quar­ter of 2023. Fur­ther­more, Andes is work­ing to deliv­er mis­sion-crit­i­cal ASIL-D cer­ti­fied cores based on their pop­u­lar CPU IPs. The goal of this part­ner­ship is to offer com­pre­hen­sive sup­port for func­tion­al safe­ty solu­tion develop­ment, par­tic­u­lar­ly in the realm of firmware and MCAL develop­ment. These resources will sub­se­quent­ly be employed by their cus­tomers with­in the auto­mo­tive sup­ply chain.

MachineWare’s ultra-fast vir­tu­al pro­to­types facil­i­tate sim­u­la­tion of com­plex hardware/software sys­tems for soft­ware analy­sis, ver­i­fi­ca­tion and develop­ment as well as archi­tec­ture explo­ration. With SIM-V MachineWare offers a high-speed RISC-V sim­u­la­tor that can be inte­grat­ed in a full-sys­tem sim­u­la­tion, or Vir­tu­al Plat­form (VP) to sim­u­late entire SoCs or ECUs. Besides pre-sil­i­con avail­abil­i­ty, VPs offer many advan­tages over phys­i­cal pro­to­types, as they enable for deep, non-intru­sive intro­spec­tion and are extreme­ly scal­able either on-premise or in the cloud.

The com­bi­na­tion of prod­ucts from the three com­pa­nies enables users to switch seam­less­ly between vir­tu­al and phys­i­cal SoCs, apply­ing the same tools and automa­tion scripts with­out any changes to the users’ process. This allows soft­ware devel­op­ers to start the develop­ment process before sil­i­con is avail­able and iden­ti­fy and fix poten­tial bugs and secu­ri­ty issues at an early stage, short­en­ing time-to-mar­ket.

Ger­ard Vink, respon­si­ble for RISC-V at TASKING, is excit­ed about the col­lab­o­ra­tion of the three com­pa­nies: “This part­ner­ship offers an inte­grat­ed solu­tion need­ed to drive the adop­tion of RISC-V based SoCs in the auto­mo­tive domain. The cer­ti­fied IPs and tools reduce the efforts of all par­ties in the sup­ply chain to com­ply with func­tion­al safe­ty and cyber­se­cu­ri­ty require­ments, enabling them to focus on inno­va­tion and prod­uct dif­fer­en­ti­a­tion.”

“Andes’ ISO 26262 cer­ti­fied RISC-V IP offers solid, unprece­dent­ed flex­i­bil­i­ty and effi­cien­cy in sil­i­con develop­ment”, said Samuel Chi­ang, Deputy Mar­ket­ing Direc­tor of Andes, “Togeth­er with TASKING and MachineWare, we empow­er cus­tomers in the auto­mo­tive indus­try to accel­er­ate their develop­ment efforts, ensur­ing the suc­cess­ful achieve­ment of func­tion­al safe­ty and cyber­se­cu­ri­ty pro­tec­tion.”

“Our ultra-fast SIM-V func­tion­al RISC-V sim­u­la­tor empow­ers engi­neers to sim­u­late com­plex hardware/software sys­tems long before phys­i­cal pro­to­types are even avail­able. This speeds up the develop­ment process and reduces expen­sive bugs”, said Lukas Jünger, co-founder of MachineWare. “We are proud to col­lab­o­rate with TASKING and Andes to offer our cus­tomers the tools they need for devel­op­ing SoCs for the auto­mo­tive indus­try.”

For more detailed infor­ma­tion about the part­ner­ship and the three com­pa­nies, please visit www.tasking.com, www.andestech.com and www.machineware.de.

About Andes Tech­nol­o­gy

As a Found­ing Pre­mier mem­ber of RISC-V Inter­na­tion­al, Andes (TWSE: 6533; SIN: US03420C2089; ISIN: US03420C1099) is a lead­ing sup­pli­er of high-per­for­mance/low-power embed­ded proces­sor IP solu­tions. Its RISC-V CPU fam­i­lies range from tiny 32-bit cores to advanced 64-bit Out-of-Order proces­sors with DSP, FPU, Vec­tor, Linux, super­scalar, and/or mul­ti­/­many-core capa­bil­i­ties.  By the end of 2022, the cumu­la­tive vol­ume of Andes-Embed­ded™ SoCs has sur­passed 12 bil­lion. For more infor­ma­tion, please visit https://www.andestech.com. Fol­low Andes on LinkedIn, Twit­ter, Bili­bili and YouTube!

About MachineWare

Estab­lished in 2022 in Aachen, Ger­many, MachineWare is a pio­neer­ing com­pa­ny spe­cial­iz­ing in the cre­ation of high-per­for­mance sim­u­la­tors for entire elec­tron­ic sys­tems, com­mon­ly referred to as Vir­tu­al Plat­forms (VPs). These cut­ting-edge VPs are designed to exe­cute unmod­i­fied tar­get soft­ware, serv­ing as indis­pens­able tools for develop­ment, ver­i­fi­ca­tion, and archi­tec­ture explo­ration.

One of MachineWare’s flag­ship offer­ings, SIM-V, stands out as a ver­sa­tile and rapid solu­tion tai­lored for vir­tu­al­iz­ing RISC-V sys­tems. SIM-V empow­ers users to accel­er­ate their RISC-V soft­ware develop­ment process, allow­ing them to meet and exceed their sched­ules by help­ing to iden­ti­fy soft­ware defects, such as bugs and vul­ner­a­bil­i­ties long before phys­i­cal pro­to­types are avail­able.

MachineWare’s prod­ucts and ser­vices sim­pli­fy hardware/software inte­gra­tion by pro­vid­ing a uni­fied toolset for both hard­ware and soft­ware design­ers early in the sys­tem design cycle. This approach facil­i­tates a smoother develop­ment process and supe­ri­or end prod­ucts. Visit https://www.machineware.de for more details.

About TASKING

TASKING is a lead­ing provider of develop­ment tools head­quar­tered in Munich, Ger­many, offer­ing high-per­for­mance, high qual­i­ty, safe­ty & secu­ri­ty-ori­ent­ed embed­ded soft­ware develop­ment tools for multi-core archi­tec­tures.

TASK­ING’s develop­ment tools are used by auto­mo­tive man­u­fac­tur­ers and sup­pli­ers, as well as in adja­cent mar­kets around the world to real­ize high-per­for­mance appli­ca­tions in safe­ty-crit­i­cal areas.

The TASKING Embed­ded Soft­ware Develop­ment solu­tions pro­vide an indus­try-lead­ing ecosys­tem for your entire soft­ware develop­ment process. Each TASKING com­pil­er is designed for a cer­tain archi­tec­ture and meets the spe­cif­ic require­ments of your indus­try, includ­ing auto­mo­tive, indus­tri­al, telecom­mu­ni­ca­tions and dat­a­com. As the rec­og­nized leader in high-qual­i­ty, fea­ture- and safe­ty-com­pli­ant embed­ded soft­ware develop­ment tools, TASKING enables you to cre­ate code with best-in-class size and per­for­mance with com­pil­ers, debug­gers and RTOS sup­port for indus­try-lead­ing micro­proces­sors and micro­con­trollers.

Since Feb­ru­ary 2021, TASKING has been major­i­ty-owned by finan­cial investor FSN Cap­i­tal, which has put the group on a long-term growth path fol­low­ing a suc­cess­ful carve-out. For more infor­ma­tion visit www.tasking.com or fol­low us on https://www.linkedin.com/company/tasking-inc.