TASKING TriCore VX-Toolset v2.2r2



This release note describes the changes and new features of all TASKING TriCore products since v2.2r1. This pack contains a workaround for a new Silicon Bug as well as updates for reported problems.

The following parts are described:

The solved and known problems are not part of this release note, they are described in the file solved_2_2r2.html delivered with the product.

The main reasons for this release are:


Within menu 'Project | Project Options...' page 'Processor | Bypasses' the new silicon bug workaround can be found.

Solving of reported problem

Some corrections have been made to the silicon bugs that affect specific derivatives.


Silicon bug workaround CPU_TC.052

The compiler prevents load (ld) and store (st) instructions to be combined. For example, silicon bug workaround CPU_TC052 prevents that two ld.w instructions are combined into one ld.dw instruction.

No default section alignment

By default the compiler generates a 4 byte alignment for sections, this is done because the default initialization code does not know where code ends up and hardware could require a word aligned read/access to the memory. With the option --no-default-section-alignment, sections are no longer forced to a 4 byte alignment.

Please note, this means that you will have to use your own initialization code!
Furthermore you will have to remove the copy_unit = 4 part of the copytable declaration within the LSL file.

New pragma's introduced

Pragma Description
section_per_data_object All data objects get their own section, using naming scheme like "prefix.module_name.<symbol name>"
section_name_with_symbol All section renaming pragma's will use a renaming scheme like "prefix.symbol_name.<pragma value>"

Solving of reported problem

Some corrections have been made to the silicon bugs that affect specific derivatives.


Section overflow feature

Using "overflow", a linker-created section size will "overflow" selected sections to another linker-created section if they do not fit in this section.

For example:

section "tsk1_data" (size=4k, attributes=rw, fill=0, overflow = "overflow_data" )
	select ".data.tsk1.*"

section "tsk2_data" (size=4k, attributes=rw, fill=0, overflow = "overflow_data" )
	select ".data.tsk2.*"

section "overflow_data" (size=4k, attributes=rx, fill=0)


The libraries have been updated to prevent new silicon bugs to trigger. The libraries are rebuild, using the new compiler and assembler.

MMU libraries

Special MMU libraries have been added for derivatives that have a MMU on board. These libraries can be found in the subdirectory lib/tc1_mmu/ and lib/tc2_mmu. These MMU libraries contain a natural alignment for data objects. For example, wordsized data is wordaligned and doublewordsized data is doubleword aligned.

Please note, protected libraries for derivatives that do have a MMU (e.g. TC11xx) are also updated with this requirement of the MMU.


Control Program

You can pass the new silicon bug to the control program by using the --silicon-bug option. The control program recognizes the silicon bug and passes the options to the correct tool(s).


Solving of reported problem

CrossView Pro crashed after a global user defined variable has been set through the commandline, e.g.:


Copyright 2005 Altium BV