TASKING VX-toolset for TriCore and PCP v3.4r1
Release Note


This release note covers the changes between v3.3r1 and v3.4r1 of the TASKING VX-toolset for TriCore and PCP.


Important Notices

End of support TriCore TC1.2 and PCP1.5, as well as derivatives TC1765 and TC1775

The TC1.2 core and derivatives based on this core level, the TC1765 and TC1775, are no longer supported. All references, i.e. files and options, have been removed from the complete toolset. This implies also the end of support for the PCP1.5 core. In case the core TC1.2 or PCP1.5 is still required, it is advised to use an older version of the toolset.

Change in non-trapping floating point runtime library sources

With EABI version v2.4, floating point support must be IEEE-754 compliant. This was not the case with the used floating point library implementation as supplied by Infineon. The incorrect assembly source floating point library is now replaced by Altium's own c-source floating point library. These sources are used for both the trapping and non-trapping variants.

Upon using the EABI and IEEE-754 compliant runtime floating point library, there may be a minor negative effect on code size and runtime speed. Please refer to 160-36937.

Conflicting control program options

Control program does no long accept the --no-double option, because it was conflicting with the --use-double-recision-fp option. With the options --fpu-present, --use-double-precision-fp and --fp-trap all useful combinations are supported. Please refer to 160-37585.

Changes in (default) compiler behavior

Option --section-per-data-object has become the default

Each data object will be generated in its own section. This will enable the linker to do better optimization, resulting in less gaps between data objects. This feature was already in use for functions and it can not be disabled or undone. It will have no impact on backwards compatibility.

The option --section-per-data-object has been become superfluous. The compiler will issue a warning that the option is deprecated. It is advised to remove the option from your build script.

Default code section alignment is 2

Because of a functional discrepancy of the default code section alignment 8 with tradeoff for code (-t4), the default code section alignment has been changed to 2. This has no impact on backwards compatibility.


There was a discrepancy between the __align() attribute and the --align option and its associated #pragma align. The __align() attribute is now handling the alignment conform the option and pragma. Besides this, they only accept a value that is 0 (the default and maning natural alignment), 4 or larger than 4 and a power of 2. Otherwise an error will be issued. Please refer to 160-37422.

Fused multiply Add and Subtract

For certain optimization-levels, the compiler might optimize floating-point terms of the form a + ( b * c) or a - ( b * c) utilizing the TC V1.3 fused multiply-add/subtract opcodes madd.f and msub.f. These opcodes perform the multiplication and the subsequent addition/subtraction in one instruction. Please refer to 160-37680.

However, since these opcodes are documented to not perform IEEE-754 compliant rounding on the result of the multiplication, the result as obtained by msub.f d,a,b,c is different in certain cases from the IEEE-754 compliant result which would be obtained by the combination of mul.f e,b,c and sub.f d,a,e.

These instructions will still be generated by default, but may be suppressed by the new option --no-macs. Please refer to 160-37774.

The *_fpu libraries are generated using these fused instructions. This means that if you choose to compile with the --no-macs option, you should be aware of the fact that the *_fpu libraries are still using the fused instructions. This might cause inconsistencies. You should therefore add the --no-macs option to the compiler flags of the required _fpu library and rebuild it.

Improved section renaming

The default section name is: section_type_prefix.module_name.symbol_name

Sections of a specific type can be renamed using section pragma. #pragma section <type>[=<name>]
The types are: code / nearbss / neardata / nearnoclear / nearrom / farbss / fardata / farnoclear / farrom / a0bss / a0data / a1rom / a8bss / a8data / a8rom / a9bss / a9data / a9rom.

Renaming all section names with the same prefix has a lower priority then renaming sections with a specific type. All sections can be renamed with: -R --rename-sections[=<name>] and #pragma section all[=<name>]

When sections are renamed, using previous options or pragma's, module name and symbol name are not included in the section name. The module name is only added when option --section-name-with-module (hidden) or #pragma section_name_with_module is used. The symbol name is only added when option --section-name-with-symbol or #pragma section_name_with_symbol is used.

For more information, please refer to the manual.

Byte aligned sections (e.g. copy-table)

Initialization of byte aligned section is also required for compiler generated data sections without the default 4-byte alignment and using linker copy unit 1. These features make it possible to avoid alignment gaps generated by compiler and linker.

In previous versions, you needed the C compiler option --no-default-section-alignment to force sections not to a 4-byte alignment. You needed to create your own initialization code, and had to remove the copy_unit = 4 part of the copytable declaration within the LSL file. This is no longer required and the default option now. Please refer to 160-37708.

New in v3.4

This section gives an overview of the most important new features and improvements in v3.4. See the sections with fixed issues for a complete list.

New High-Level ELF-object dumper

The new ELF-object dumper is called hldumptc. It is a high-level language (HLL) object dumper. With this utility you can dump information about an object file. Key features are a disassembler with HLL source intermixing and HLL symbol display and a HLL symbol listing of static and global symbols. Please refer to the manual for detailed information.

Derivatives device simulator debug support

For the following list of new derivatives, device simulator debug support is available:

    'AUDO MAX' derivative TC1791, core TC1.6.
    'AUDO MAX' derivative TC1793, core TC1.6.
    'AUDO MAX' Bare Die derivative TC1746 [TC1782bd], core TC1.3.1.
    'AUDO MAX' Bare Die derivative TC1748 [TC1798bd], core TC1.6.
    'AUDO Safe' Bare Die derivative TC1768 [TC1387bd], core TC1.3.1.

CERT C support for PCP compiler

In addition to the the TriCore compiler's extension with CERT C support with the release v3.3r1, the PCP compiler is extended with this feature too. CERT, the Computer Emergency Readiness Team was founded by the US government and created the coding standard as a guideline to secure coding. More information is available on the CERT website.

The CERT C secure code checking functionality is available in the Premium Edition.

The compiler can check for the following rules and recommendations:

Category Implemented Checks
01. Preprocessor PRE01, PRE02, PRE10, PRE11
02. Declarations and Initialization DCL30, DCL31, DCL32, DCL35
03. Expressions EXP01, EXP12, EXP30, EXP32, EXP33, EXP34, EXP37, EXP38
04. Integers INT30, INT34, INT35
05. Floating Point FLP30, FLP35, FLP36
06. Arrays ARR01, ARR34, ARR35
07. Characters and Strings STR30, STR33, STR34, STR36
08. Memory Management MEM00, MEM08, MEM30, MEM31, MEM32, MEM33, MEM34, MEM35
10. Environment ENV32
11. Signals SIG30, SIG32
49. Miscellaneous MSC32

Distribution of all library sources

With this release the sources of the libraries, for both TriCore and PCP, are distributed. For each library a makefile exists by which the library can be rebuilt. This will give you a larger freedom of changing the libraries to you own needs.

New profiling option to exclude interrupt time from normal functions

The compiler has been extended with the feature to perform profiling while excluding time spent in interrupt functions. This new option is -pi, which enables interrupt timing. The default value for -p is off, whil the default for -pg is on.

Eclipse upgrade

The Eclipse IDE has been upgraded to the global version Galileo, including CDT 6.0.2.

In addition to this, a minor change in the dialogue of the New Project wizard is introduced. When creating a new project, one can now select the processor already.

Fixed issues for v3.4r1


New Feature


The list of open issues for v3.4r1 can be found on the internet.

Quick start

For a quick start, just start the 'TASKING VX-toolset for TriCore and PCP' from the start menu. This will start the Eclipse based development environment. You will be asked to select a workspace. In case you used Eclipse before it is recommended to select a new workspace. After clicking OK, you will see the 'Welcome' view. On this view you will see icons that link to specific information. You can, for example, select the 'Samples' icon and import the TriCore project examples and/or the PCP project examples.

Another icon on the Welcome page, the 'First Steps' icon, links to the 'TriCore Getting Started' and the 'PCP Getting Started' documents. This is a good starting point for exploring the capabilities of the environment and the tools.

License Information

15-day Trial

When using the product without a valid license, the tools will run in trial mode. This means you can use the toolset 15 days with full functionality. When running in trial mode, each tool will report the number of days left. When using a license that does not cover the full toolset, the tools that are not covered by the license will run in trial mode.

When after installing the license file the tools that are covered by the license still report that they are running in trial mode, this means that there is a license error. If you want to force the termination of the trial mode to get the FLEXlm error message you can set the environment variable FORCE_NO_TRIAL to "yes".

How to Obtain a License Key

All TASKING products include the industry standard FLEXlm license management software. In order to be able to run this toolset, you will need a license key, although you can use the full functionality during the 15 day trial period as described above. You can only obtain a license key if you have purchased this product.

To obtain a license key, you can start the License Administrator from the program group of your installed TASKING toolset. In case you still need to install the toolset, you can start the License Administrator by setting a check mark at the end of the setup/installation process. The wizard of the License Administrator will guide you through the steps to obtain your license key.
Once you have received your license key from Altium, you can install it on your system by running the License Administrator again. Alternatively you can simply save the license key as the file 'license.dat' in the C:\FLEXLM folder on your PCs hard disk.

More information is available on http://www.tasking.com/support/flexlm. On this page you also find assistance to setup a floating network license, or for installation on Linux or Sun systems.


Altium's TASKING VX-toolset for TriCore and PCP is available as Standard, Professional and Premium Edition. At installation time all tools are installed, no matter what bundle you purchased or want to evaluate. However, each tool is protected with its own unique key. After your purchase you will release a license key - specific for the bundle - to unlock the appropriate tools. Any tools from a more extensive bundle than what you purchased, will continue to run as full trial version for maximum 15 days (depending on how many days you already used).